NMOS 4T resistor-biased cascoded current mirror
From ICclopedia
Schematic Diagram
Circuit Netlist
* dev <nets> <values> * -----------------------------------
SPICE Simulations
Operating Point Analysis
DC Analysis (Sweep)
File:NMOS 4T cascoded current mirror simulation dc analysis.svg
Monte Carlo Analysis
File:NMOS 4T cascoded current mirror simulation mc analysis.svg
Results
Figures of Merit
References
- Designing Analog Chips (Hans Camenzind)
- Chapter 3 (pages 3-7)
Toolchain
- ICclopedia Toolchain.
- PTM 130nm CMOS SPICE models.