Category:MOS transistors characterization

For MOS transistors characterization, the following are important dimension, device and design parameters.

= Transistors dimension parameters =

MOS transistors are physically defined primarily by the following parameters:

Length (L)
The actual physical device length

Width (W)
The total width (W) of a transistor device is dependent on:


 * Wf: Finger's width, and
 * Nf: Number of fingers

and


 * m: Parallel multiplier
 * Number of identical devices in parallel

The total width (W) then being the finger's width times the number of fingers multiplied times the number of identical transistors in parallel:


 * W=(Nf*Wf)*m

= Device parameters =

Some important transistor device and bias parameters are the following:

Vgs, Vds, Vbs
The gate-to-source, drain-to-source and bulk-to-source DC bias voltages.

Vth
The Device threshold voltage and transition point from cutoff (sub-threshold weak inversion) to moderate inversion ("ON").

Veff or Vov
The effective overdrive voltage. A proxy for understanding the device inversion level. Used widely as a design parameter in analog design.

More formally defined as Veff = Vgs - Vth

Vdsat
Minimum active (saturation) voltage (MOS), i.e. the minimum voltage across drain to source that keeps devices in active-sat. While traditionally equal to Veff for longer channel devices, for short-channel devices it is no longer the same, but serves as a close proxy.

Id
The DC drain current at biased operating point.

cxx
Device parasitic capacitances. Most important here being lumped capacitances to ground Cgg and Cdd (also Css and Cbb), but also mutual capacitances between terminals -- these are especially important for stability at high-frequencies.

Note these are highly non-linear, hence for analog design these must be considered as small signal quantities.

rds or 1/gds
Device output drain-source resistance (or the inverse, drain-source conductance). This device parameter is largely dependent on relative length and is absolutely critical for enabling large intrinsic device voltage gain.

= Active Design parameters =

Most important after specifying and simulating device parameters is understanding the performance limits of your devices so as not to engage in designs where it is not possible to meet your goals. Some very important transistor design parameters are the following:

gm
Transconductance gain due to nominal input "gate", defined as Iout/Vin. Often specified as design requirement to synthesize larger analog block.

gmb
Transconductance gain due to bulk/substrate back-gate, defined as Iout/Vbs. This design parameter must be considered when source and bulk are not at the same potential, it can be exploited sometimes beneficially to yield larger total device transconductance for lower power.

gm/Id
Transconductor current efficiency, in a nutshell how much current do you need to spend to yield a desired transconductance gain. Typically specified in S/A.

The gm/Id design parameter, can also be used as a proxy for understanding the device inversion level. (but now in terms of other useful design parameters)

Keep in mind, the maximum gm/Id range has tended to be constant over technology nodes (< 30)

gm/W
Transconductor area efficiency, in a nutshell how much IC width (proportional area) do you need to spend to yield a desired transconductance gain. Typically specified in S/um.

Id/W
Current density. How much current can you support for a given device width. Typically specified in mA/um.

This parameter is often times used alternatively to gm/W at larger currents where reliability and electron migration are a concern.

ao
Device intrinsic voltage gain: the maximum voltage gain attainable from a single device at DC. Defined as Vout/Vin and typically unit-less or V/V.

Can be calculated from design parameters as: ao = gm x rds (or equally gm / gds)

Ft or GBW
Unity-gain frequency: the frequency where the device current gain (Iout/Iin) is 1. Beyond this point the device is typically no longer an amplifier.

Note current gain also applies to MOSFET transistors, recall at larger frequencies the gate impedance is actually finite. Typically it often makes little sense to operate devices near their Ft frequency as there is an exponential decreasing gain returns to power spent. (often times limiting the bandwidth to Ft/10 is more reasonable)

The simulator often provides most accurate Ft approximations, else a good rough approximation for Ft is Ft=gm/Cgg.

Another alternative useful design parameter is the GBW: the gain-bandwith-product which is defined as GBW= a x f. It is equal to Fc (when Fc is known) or can be also computed at other frequencies above Fc assuming a dominant pole approximation.

Fc
Device -3dB bandwidth corner frequency. Assuming a dominant pole approximation, a rough approximation being Fc=gm/Cload (Fc=gm/Cdd for self-loaded case). These parameter is often more useful for understanding the speed of larger amplifier stages. (e.g. in the case of Opamps)

FoM
Typical device figure-of-merit for given technology, defined as FoM = gmid x Ft. Typically biasing at max FoM represents a good operating point for transistors when high-speed power-efficient operation is desired.

= Triode Design Parameters =

Only applicable to devices operated mainly as "switches" between triode (Vgs ~ Vdd and Vds ~ 0) and cutoff regions (at Vgs ~ 0).

Typically, the minimum the switch ON resistance relative to it's OFF resistance for the same output capacitance, the better the switch.

Switches are also defined by their maximum bandwidth, defined as W3db = 1 / (Ron*Cout)

Ron
Effective/averaged ON resistance of the switch device in triode. The minimum the ON resistance of the switch, the better.

Cout
Effective ON output capacitance of the switch device in triode. The minimum the output capacitance of the switch, the better the bandwidth for the same drive power.

Roff
Effective/averaged OFF resistance of the switch device in cutoff. The larger the OFF resistance of the switch, the lower the leakage power of the switch. Additionally a larger OFF resistance avoid incurring errors in discrete time sampling circuits.

Cgate
Lumped averaged input capacitance of the switch device to switch ON/OFF. Sets the required power for the driver to fully switch gate given switching frequency.